Publications

Invited Magazine Articles

  1. Darshika G. Perera, "Reconfigurable Architectures for Data Analytics on Next-Generation Edge-Computing Platforms", Featured Article, IEEE Canadian Review Magazine, vol. 33, no. 1, Spring 2021. My paper is available here , and the Full Magazine is available here.

Peer-Reviewed Journal Papers

Names of my graduate students and post-docs are underlined

  1. Dileep Kumar Yadav, Shailendra Pratap Singh, Mohammad Kazem Chamran, and Darshika G. Perera, "Intelligent Mutation based Evolutionary Optimization Algorithm for Genomics and Precision Medicine", Journal of Functional & Integrative Genomics, Springer, vol. 24, no. 128, 22nd July 2024. (Impact factor 3.9).
  2. Mokhles A. Mohsin, S. Navid Shahrouzi, and Darshika G. Perera, "Composing Efficient Computational Models for Real-Time Processing on Next-Generation Edge-Computing Platforms", IEEE ACCESS, (Open Access Journal in IEEE), 30-page manuscript, 13th February 2024. (Impact factor 3.9). Full version is available here.
  3. E. Ranjith, Latha Parthiban, T. P. Latchoumi, S. Ananda Kumar, Darshika G. Perera, and Sangeetha Ramaswamy, "An Effective Content Based Image Retrieval System Using Deep Learning Based Inception Model", International Journal on Wireless Personal Communications, Springer Nature, 19-page manuscript, January 2024. DOI: 10.1007/s11277-023-10792-8, (Impact factor 1.8).
  4. Anne K. Madsen and Darshika G. Perera, "Towards Composing Efficient FPGA-Based Hardware Accelerators for Physics-Based Model Predictive Control Smart Sensor for HEV Battery Cell Management", IEEE ACCESS, (Open Access Journal in IEEE), pp. 106141-106171, 25th September 2023. (Impact factor 3.9). Full version is available here.
  5. Raghavendra K. Chunduri and Darshika G. Perera, "Neuromorphic Sentiment Analysis Using Spiking Neural Networks", Sensors, MDPI open access journal, Sensing and Imaging Section, 24-page manuscript, vol. 23, no. 7701, 6th September 2023. (Impact factor 3.9). Full version is available here.
  6. K. Lavanya, Abhilasha Gondchar, Irene Maria Mathew, Sumitkumar Sarda, S. Ananda Kumar, Anand Mahendran, and Darshika G. Perera, "Land Cover Classification Using LANDSAT 7 Data For Land Sustainability", International Journal on Wireless Personal Communications, Springer Nature, 19-page manuscript, 8th August 2023. DOI: 10.1007/s11277-023-10631-w, (Impact factor 1.8).
  7. Anne K. Madsen and Darshika G. Perera, "Composing Optimized Embedded Software Architectures for Physics-Based EKF-MPC Smart Sensor for Li-Ion Battery Cell Management", Sensors, MDPI open access journal, Intelligent Sensors Section, 21-page manuscript, vol. 22, no. 17, 26th August 2022, (Impact factor 3.847). Full version is available here.
  8. Srikanth Ramadurgam and Darshika G. Perera, "An Efficient FPGA-Based Hardware Accelerator for Convex Optimization-Based SVM Classifier for Machine Learning on Embedded Platforms", Electronics, MDPI open access journal, 36-page manuscript, vol. 10, no. 11, 31st May 2021. (Impact factor 2.412). Full version is available here.
  9. Arkan Alkamil and Darshika G. Perera, "Towards Dynamic and Partial Reconfigurable Hardware Architectures for Cryptographic Algorithms on Embedded Devices", IEEE Access, Open Access Journal in IEEE, vol. 8, pp: 221720 – 221742, 10th December 2020. (Impact factor 3.75). Full version is available here.
  10. S. Navid Shahrouzi, Arkan Alkamil, and Darshika G. Perera, "Towards Composing Optimized Bi-Directional Multi-Ported Memories for Next-Generation FPGAs", IEEE Access, an open access IEEE journal, vol. 8, no. 1, pp. 91531-91545, 14th May 2020, Full version is available here., (Impact factor3.75).
  11. S. Navid Shahrouzi and Darshika G. Perera, "Optimized Hardware Accelerators for Data Mining Applications on Embedded Platform: Case Study Principal Component Analysis", Elsevier Journal on Microprocessor and Microsystems (MICPRO), vol. 65, pp. 79-96, March 2019, (Impact factor 1.1).
  12. Darshika G. Perera and Kin F. Li, "A Design Methodology for Mobile and Embedded Applications on FPGA-Based Dynamic Reconfigurable Hardware", International Journal of Embedded Systems, (IJES), Inderscience publishers, 23-page manuscript, vol. 11, no. 5, September 2019, DOI: 10.1504/IJES.2019.10018522.
  13. Anne K. Madsen and Darshika G. Perera, "Efficient Embedded Architectures for Model Predictive Controller for Battery Cell Management in Electric Vehicles", EURASIP Journal on Embedded Systems, SpringerOpen, vol. 2018, article no. 2, 36-page manuscript, 16th July 2018, (Impact factor 1.33). Full version is available here.
  14. S. Navid Shahrouzi and Darshika G. Perera, "Dynamic Partial Reconfigurable Hardware Architecture for Principal Component Analysis on Mobile and Embedded Devices", EURASIP Journal on Embedded Systems, SpringerOpen, vol. 2017, article no. 25, 18-page manuscript, 21st February 2017, (Impact factor 1.33). Full version is available here.
  15. Kin F. Li and Darshika G. Perera, "A Hardware Collective Intelligent Agent", Transactions on Computational Collective Intelligence, LNCS 7776, Springer, pp. 45-59, 2013.
  16. Darshika G. Perera and Kin F. Li, "Hardware Acceleration for Similarity Computations of Feature Vectors", IEEE Canadian Journal of Electrical and Computer Engineering, (CJECE), vol. 33, no. 1, pp. 21-30, Winter 2008.

Peer-Reviewed Conference Papers

Names of my graduate students and post-docs are underlined

  1. Kevin Young and Darshika G. Perera, "High-Level Synthesis Based FPGA Accelerator for GPS Signal Image Feature Extraction", Submitted to IEEE Workshop on Signal Processing Systems (SiPS'24), 6-page manuscript, submitted on 19th April, MIT, Cambridge MA, November 2024.
  2. Ian D. Atwell and Darshika G. Perera, "HDL Code Variation: Impact on FPGA Performance Metrics and CAD Tools", in Proceedings of theIEEE Pacific Rim International Conference on Communications, Computers, and Signal Processing, (PacRim'24), 6-page manuscript, Victoria, BC, Canada, August 2024.
  3. Darshika G. Perera and Kin F. Li, "Discrepancy in Execution Time: Static vs. Dynamic Reconfigurable Hardware", in Proceedings of the IEEE Pacific Rim International Conference on Communications, Computers, and Signal Processing, (PacRim'24), 6-page manuscript, Victoria, BC, Canada, August 2024.
  4. Srikanth Ramadurgam and Darshika G. Perera, "A Systolic Array Architecture for SVM Classifier for Machine Learning on Embedded Devices", in Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS'23), 5-page manuscript, Monterey, California, May 2023.
  5. Jeremy R. Graf and Darshika G. Perera, "Optimizing Density-Based Ant Colony Stream Clustering Using FPGA-Based Hardware Accelerator", in Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS'23), 5-page manuscript, Monterey, California, May 2023.
  6. Jari Nurmi and Darshika G. Perera, "Intelligent Cognitive Radio Architecture Applying Machine Learning and Reconfigurability", in Proceedings of the IEEE Nordic Circuits and Systems (NorCAS'21) Conference, 6-page manuscript, Oslo, Norway, October 2021.
  7. Anne K. Madsen, M. Scott Trimboli and Darshika G. Perera, "An Optimized FPGA-Based Hardware Accelerator for Physics-Based EKF for Battery Cell Management", in Proceedings of the IEEE International Symposium on Circuits and Systems, (ISCAS'20), 5-page manuscript, Seville, Spain, May, 2020.
  8. P.V.V. Kishore, Darshika G. Perera, M. Teja Kiran Kumar, D.Anil Kumar, and E.Kiran Kumar, "A Quad Joint Relational Feature for 3D Skeletal Action Recognition with Circular CNNs", in Proceedings of the International Symposium on Circuits and Systems, (ISCAS'20), 5-page manuscript, Seville, Spain, May, 2020
  9. Arkan Alkamil and Darshika G. Perera, "Efficient FPGA-Based Reconfigurable Accelerators for SIMON Cryptographic Algorithm on Embedded Platforms", in Proceedings of the 10th IEEE International Conferences on Reconfigurable Computing and FPGAs, (ReConFig'19), 8-page manuscript, Cancun, Mexico, December 2019.
  10. Mong T. Sim and Darshika G. Perera, "A Fast and Secure Pipelined Barrel Processor for Safety Critical Applications for Real-Time Operating Systems", in Proceedings of the 10th IEEE Annual Ubiquitous Computing, Electronics, and Mobile Communication Conference, (UEMCON'19), 10-page manuscript, Columbia University, New York, October 2019. (acceptance rate: 33%).
  11. S. Navid Shahrouzi and Darshika G. Perera, "HDL Code Optimization: Impact on Hardware Implementations and CAD Tools", in Proceedings of the IEEE Pacific Rim International Conference on Communications, Computers, and Signal Processing, (PacRim'19), 9-page manuscript, Victoria, BC, Canada, August 2019.
  12. S. Navid Shahrouzi and Darshika G. Perera, "Optimized Counter-Based Multi-Ported Memory Architectures for Next-Generation FPGAs", in Proceedings of the 31st IEEE International Systems-On-Chip Conference, (SOCC'18), 6-page manuscript, Arlington, VA, September 2018.
  13. Mokhles A. Mohsin and Darshika G. Perera, "An FPGA-Based Hardware Accelerator for K-Nearest Neighbor Classification for Machine Learning on Mobile Devices", in Proceedings of IEEE/ACM International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, (HEART'18), 6-page manuscript, Toronto, Canada, June 2018. (Best Poster Paper Award) .
  14. Ramprasad Raghavan and Darshika G. Perera, "A Fast and Scalable FPGA-Based Parallel Processing Architecture for K-Means Clustering for Big Data Analysis", in Proceedings of IEEE Pacific Rim International Conference on Communications, Computers, and Signal Processing, (PacRim'17), pp. 1-8, Victoria, BC, Canada, August 2017.
  15. S. Navid Shahrouzi and Darshika G. Perera, "An Efficient FPGA-Based Memory Architecture for Compute-Intensive Applications on Embedded Devices", in Proceedings of IEEE Pacific Rim International Conference on Communications, Computers, and Signal Processing, (PacRim'17), pp. 1-8, Victoria, BC, Canada, August 2017.
  16. S. Navid Shahrouzi and Darshika G. Perera, "An Efficient Embedded Multi-Ported Memory Architecture for Next-Generation FPGAs", in Proceedings of the 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors, (ASAP'17), pp. 83-90, Seattle, WA, USA, July 2017,(acceptance rate: 29%).
  17. Darshika G. Perera and Kin F. Li, "Analysis of Computation Models and Application Characteristics Suitable for Reconfigurable FPGAs", in Proceedings of the 10th IEEE International Conference on P2P, Parallel, Grid, Cloud, and Internet Computing, (3PGCIC'15), pp.244-247, Krakow, Poland, November 2015, (acceptance rate: 30%).
  18. Darshika G. Perera "Analysis of FPGA-Based Reconfiguration Methods for Mobile and Embedded Applications", in Proceedings of 12th ACM FPGAWorld International Conference, (FPGAWorld'15), pp.15-20, Stockholm, Sweden, September 2015.
  19. Darshika G. Perera and Kin F. Li, "Analysis of Single-Chip Hardware Support for Mobile and Embedded Applications", in Proceedings of IEEE Pacific Rim International Conference on Communication, Computers, and Signal Processing, (PacRim'13), pp. 369-376, Victoria, BC, Canada, August 2013.
  20. Darshika G. Perera and Kin F. Li, "FPGA-Based Reconfigurable Hardware for Compute Intensive Data Mining Applications", in Proceedings of 6th IEEE International Conference on P2P, Parallel, Grid, Cloud, and Internet Computing, (3PGCIC'11), pp. 100-108, Barcelona, Spain, October 2011, (acceptance rate: 26%), (Best Paper Award) .
  21. Darshika G. Perera and Kin F. Li, "Embedded Hardware Solution for Principal Component Analysis", in Proceedings of IEEE Pacific Rim International Conference on Communication, Computers, and Signal Processing, (PacRim'11), pp.730-735, Victoria, BC, Canada, August 2011.
  22. Darshika G. Perera and Kin F. Li, "Similarity Computation Using Reconfigurable Embedded Hardware", in Proceedings of 8th IEEE International Conference on Dependable, Autonomic, and Secure Computing (DASC'09), pp. 323-329, Chengdu, China, December 2009, (acceptance rate: 32%).
  23. Darshika G. Perera and Kin F. Li, "Parallel Computation of Similarity Measures Using an FPGA-Based Processor Array", in Proceedings of 22nd IEEE International Conference on Advanced Information Networking and Applications, (AINA'08), pp. 955-962, Okinawa, Japan, March 2008, (acceptance rate: 30%).
  24. Darshika G. Perera and Kin F. Li, "On-Chip Hardware Support for Similarity Measures", in Proceedings of IEEE Pacific Rim International Conference on Communication, Computers, and Signal Processing, (PacRim'07), pp. 354-358, Victoria, BC, Canada, August 2007.
  25. Kin F. Li and Darshika G. Perera, "An Investigation of Chip-Level Hardware Support for Web Mining", in Proceedings of IEEE International Symposium on Data Mining and Information Retrieval, (DMIR'07), pp. 341-348, Niagara Falls, ON, Canada, May 2007, (acceptance rate: 37%).

Books and Book Chapters

  1. Lipsa Das, Vimal Bibhu, Ajay Rana, Zahid Akhtar, and Darshika G. Perera, "Internet of Things-enabled Smart Healthcare: Blockchain Applications, and Security Dimensions", Taylor and Francis Group, July 2024.

PhD Dissertations and MSc Thesis

  1. David Abillar, "An FPGA-Based Linear Kalmann Filter for a Two-Phase Buck Converter Application", MSc Thesis, (Supervisor Dr. Darshika G. Perera), University of Colorado Colorado Springs, CO, USA, April 2024.
  2. Jeremy Graf, "Optimizing Density-Based Ant Colony Stream Clustering Using FPGAs", MSc Thesis, (Supervisor Dr. Darshika G. Perera), University of Colorado Colorado Springs, CO, USA, March 2022.
  3. Srikanth Ramadurgam, "Optimized Embedded Architectures and Techniques for Machine Learning Algorithms for On-Chip AI Acceleration", PhD Dissertation, (Supervisor Dr. Darshika G. Perera), University of Colorado Colorado Springs, CO, USA, 12th February 2021. Full version is available here.
  4. Arkan Alkamil, "Dynamic Reconfigurable Architectures to Improve Performance and Scalability of Cryptosystems on Embedded Systems", PhD Dissertation, (Supervisor Dr. Darshika G. Perera), University of Colorado Colorado Springs, CO, USA, 5th February 2021. Full version is available here.
  5. Anne K. Madsen, "Optimized Embedded Architectures for Model Predictive Control Algorithms for Battery Cell Management Systems in Electric Vehicles", PhD Dissertation, (Supervisor Dr. Darshika G. Perera), University of Colorado Colorado Springs, CO, USA, August 2020.
  6. Jordi Perera Mori, "FPGA-based Accelerators for Convolutional Neural Networks on Embedded Devices", MSc Thesis, (Supervisor Dr. Darshika G. Perera), University of Colorado Colorado Springs, CO, USA, April 2020.
  7. Laura Homet Garcia, "An FPGA-Based Hardware Accelerator for Sequence Alignment by Genetic Algorithm", MSc Thesis, (Supervisor Dr. Darshika G. Perera), University of Colorado Colorado Springs, CO, USA, December 2019.
  8. S. Navid Shahrouzi, "Optimized Embedded and Reconfigurable Hardware Architectures and Techniques for Data Mining Applications on Mobile Devices", PhD Dissertation, (Supervisor Dr. Darshika G. Perera), University of Colorado Colorado Springs, CO, USA, December 2018.
  9. Mokhles A. Mohsin, "An FPGA-Based Hardware Accelerator for K-Nearest Neighbor Classification for Machine Learning", MSc Thesis, (Supervisor Dr. Darshika G. Perera), University of Colorado Colorado Springs, CO, USA, December 2017.
  10. Mong Tee Sim, "Interoperability between Operating Systems and Microprocessors on Embedded Platforms", MSc Thesis, (Supervisor Dr. Darshika G. Perera), University of Colorado Colorado Springs, CO, USA, December 2016.
  11. Ramprasad Raghavan, "A Fast and Scalable Hardware Architecture for K-Means Clustering For Big Data Analysis", MSc Thesis, (Supervisor Dr. Darshika G. Perera), University of Colorado Colorado Springs, CO, USA, April 2016.
  12. Darshika G. Perera, "Chip-Level and Reconfigurable Hardware for Data Mining Applications", PhD Dissertation, (Supervisor Dr. Kin Fun Li), University of Victoria, Victoria, BC, Canada, April 2012.
  13. Darshika G. Perera, "Survey of Network-on-Chip Architectures and Their Implementations", MSc Thesis, (Supervisor Prof. Hannu Tenhunen), Royal Institute of Technology, Stockholm, Sweden.

Invited Talks and Presentations

  1. Darshika G. Perera, "HDL Code Variation: Impact on FPGA Performance Metrics and CAD Tools", IEEE Pacific Rim International Conference on Communications, Computers, and Signal Processing, (PacRim'24), Victoria, BC, Canada, August 2024.
  2. Darshika G. Perera, "A Systolic Array Architecture for SVM Classifier for Machine Learning on Embedded Devices", IEEE Pacific Rim International Conference on Communications, Computers, and Signal Processing, (PacRim'24), Victoria, BC, Canada, August 2024.
  3. Darshika G. Perera, "A Systolic Array Architecture for SVM Classifier for Machine Learning on Embedded Devices", IEEE International Symposium on Circuits and Systems (ISCAS'23), Monterey, California, May 2023.
  4. Darshika G. Perera, "Optimizing Density-Based Ant Colony Stream Clustering Using FPGA-Based Hardware Accelerator", IEEE International Symposium on Circuits and Systems (ISCAS'23), Monterey, California, May 2023.
  5. Darshika G. Perera, "Edge Computing-based Adaptive Machine Learning Model for Dynamic IoT Environment", IEEE International Symposium on Circuits and Systems (ISCAS'23), Monterey, California, May 2023.
  6. Darshika G. Perera, "Intelligent Cognitive Radio Architecture Applying Machine Learning and Reconfigurability", IEEE Nordic Circuits and Systems (NorCAS'21) Conference, Oslo, Norway, October 2021.
  7. Darshika G. Perera, "An Optimized FPGA-Based Hardware Accelerator for Physics-Based EKF for Battery Cell Management", IEEE International Symposium on Circuits and Systems, (ISCAS'20), Seville, Spain, May 2020.
  8. Darshika G. Perera, "A Quad Joint Relational Feature for 3D Skeletal Action Recognition with Circular CNNs", IEEE International Symposium on Circuits and Systems, (ISCAS'20), Seville, Spain, May 2020.
  9. Darshika G. Perera, "Efficient FPGA-Based Reconfigurable Accelerators for SIMON Cryptographic Algorithm on Embedded Platforms", IEEE International Conferences on Reconfigurable Computing and FPGAs, (ReConFig'19), Cancun, Mexico, December 2019.
  10. Darshika G. Perera, "FPGA-Based Architectures and Techniques for Compute and Data Intensive Applications", IEEE Student Branch Event, EAS Collage, University of Colorado Colorado Springs, November 2019.
  11. Darshika G. Perera, "HDL Code Optimization: Impact on Hardware Implementations and CAD Tools", IEEE Pacific Rim International Conference on Communications, Computers, and Signal Processing, (PacRim'19), Victoria, BC, Canada, August 2019.
  12. Darshika G. Perera, "Optimized Counter-Based Multi-Ported Memory Architectures for Next-Generation FPGAs", 31st IEEE International Systems-On-Chip Conference, (SOCC'18), Arlington, VA, September 2018.
  13. Darshika G. Perera, "An FPGA-Based Hardware Accelerator for K-Nearest Neighbor Classification for Machine Learning on Mobile Devices", IEEE/ACM International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, (HEART'18), Toronto, Canada, June 2018.
  14. Darshika G. Perera, "A Fast and Scalable FPGA-Based Parallel Processing Architecture for K-Means Clustering for Big Data Analysis", IEEE Pacific Rim International Conference on Communications, Computers, and Signal Processing, (PacRim'17), Victoria, BC, Canada, August 2017.
  15. Darshika G. Perera, "An Efficient FPGA-Based Memory Architecture for Compute-Intensive Applications on Embedded Devices", IEEE Pacific Rim International Conference on Communications, Computers, and Signal Processing, (PacRim'17), Victoria, BC, Canada, August 2017.
  16. Darshika G. Perera, "An Efficient Embedded Multi-Ported Memory Architecture for Next-Generation FPGAs", 28th Annual IEEE International Conferences on Application-Specific Systems, Architectures, and Processors, (ASAP'17), Seattle, WA, USA, July 2017.
  17. Darshika G. Perera, "Analysis of FPGA-Based Reconfiguration Methods for Mobile and Embedded Applications", 12th ACM FPGAWorld International Conference, (FPGAWorld'15), Stockholm, Sweden, September 2015.
  18. Darshika G. Perera, "Analysis of FPGA-Based Reconfiguration Methods for Mobile and Embedded Applications", 12th ACM FPGAWorld International Conference, (FPGAWorld'15), Stockholm, Sweden, September 2015.
  19. Darshika G. Perera, "Putting Technology to Work for Canada: Assisting Embedded Systems R&D", A Seminar, Faculty of Engineering, University of Victoria, BC, Canada, 2nd December 2013.
  20. Darshika G. Perera, P. Hu, and D.J. Gale, "Putting Technology to Work for Canada: Assisting Sensor Network R&D", A Presentation done at Self-Powered Sensor Network (SPSN) Workshop at University of Toronto, ON, Canada, 17th June 2013.
  21. Darshika G. Perera, "Embedded Hardware Solution for Principal Component Analysis", IEEE Pacific Rim International Conference on Communication, Computers, and Signal Processing, (PacRim'11), Victoria, BC, Canada, August 2011.
  22. Darshika G. Perera, "Introduction to Xilinx FPGA Design Tool: Embedded Development Kit (EDK)", A Graduate Seminar, Department of Electrical & Computer Engineering, University of Victoria, BC, Canada, May 2008.
  23. Darshika G. Perera, "On-Chip Hardware Support for Similarity Measures", IEEE Pacific Rim International Conference on Communication, Computers, and Signal Processing, (PacRim'07), Victoria, BC, Canada, August 2007.

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Last updated on 1st September 2024